Samsung has announced the development of its 16-gigabit DDR5 DRAM built using the first 12-nanometer (nm)-class process technology of the industry. And it has completed its product evaluation for compatibility with AMD.
“Our 12nm-range DRAM will be a key enabler in driving market-wide adoption of DDR5 DRAM,” said Jooyoung Lee, Executive Vice President of DRAM Product & Technology at Samsung Electronics.
“With exceptional performance and power efficiency, we expect our new DRAM to serve as the foundation for more sustainable operations in areas such as next-generation computing, data centers and AI-driven systems.”
“Innovation often requires close collaboration with industry partners to push the bounds of technology,” said Joe Macri, Senior VP, Corporate Fellow and Client, Compute and Graphics CTO at AMD.
“We are thrilled to once again collaborate with Samsung, particularly on introducing DDR5 memory products that are optimized and validated on ‘Zen’ platforms.”
The advanced technology became possible through a new high-K material. It increases cell capacitance and proprietary design technology to improve critical circuit characteristics.
Combined with advanced, multi-layer extreme ultraviolet (EUV) lithography, the new DRAM features the industry’s highest die density. It allows a 20 percent gain in wafer productivity.
Leveraging the latest DDR5 standard, Samsung’s 12nm-class DRAM will unlock speeds of up to 7.2 gigabits per second (Gbps). It means the company could now process two 30 gigabyte (GB) UHD movies in just one second.
The new DRAM’s exceptional speed is matched by greater power efficiency. It consumes up to 23 percent less power than the previous DRAM.
The 12nm-class DRAM will be an ideal solution for global IT companies pursuing more environment-friendly operations.
With mass production set to begin in 2023, Samsung plans to broaden its DRAM lineup built on this cutting-edge 12nm-class process technology into a wide range of market segments.
It continues to work with industry partners to support the rapid expansion of next-generation computing.
